CONTACT --\
          +-- Name: Jacob Leverich
          +-- Affiliations --\
          |                  +-- Stanford University
          |                  +-- Stanford Experimental Datacenter Lab (SEDCL)
          |       [previous] \-- Hewlett-Packard Labs
          \-- Email: leverich@cs.stanford.edu

ACADEMICS --\ Stanford University, Computer Sciences Department
            +--+-- PhD (completed April 2014)
            |  +---- NVIDIA Fellow
            |  \---- David Cheriton Stanford Graduate Fellow
            +-- Advisor: Christos Kozyrakis
            +-- Five Year Mission: Seek out and explore strange new paradigms in computer systems design.
            +-- Interests: Datacenter Power-Efficiency, Distributed Parallel Processing,
            |              Memory Systems, Parallel Architectures
            \-- Selected Publications ---\
   /-------------------------------------/
   +- PhD thesis  -- Future Scaling of Datacenter Power-Efficiency
   |     [PDF]       Jacob Leverich
   |
   +- EuroSys'14  -- Reconciling High Server Utilization and Sub-millisecond Quality-of-Service
   |     [PDF]       Jacob Leverich, Christos Kozyrakis
   |    [Slides]
   +- HotPower'09 -- On the Energy (In)efficiency of Hadoop Clusters
   |     [PDF]       Jacob Leverich, Christos Kozyrakis
   |
   +-- CAL 2009   -- Power Management of Datacenter Workloads Using Per-Core Power Gating
   |     [PDF]       Jacob Leverich, Matteo Monchiero, Vanish Talwar,
   |                 Partha Ranganathan, Christos Kozyrakis
   |
   +-- SC 2009    -- Future Scaling of Processor-Memory Interfaces
   |     [PDF]       Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis,
   |                 Jacob Leverich, Robert S. Schreiber
   |
   +-- TACO 2008  -- Comparative Evaluation of Memory Models for Chip Multiprocessors
   |     [PDF]       Jacob Leverich, Hideho Arakida, Alex Solomatikov, Amin Firoozshahian,
   |                 Mark Horowitz, Christos Kozyrakis
   |
   +-- CAL 2008   -- Multicore DIMM: an Energy Efficient Memory Module with
   |     [PDF]         Independently Controlled DRAMs
   |                 Jung Ho Ahn, Jacob Leverich, Robert S. Schreiber, Norman P. Jouppi
   |
   +-- ISCA 2007  -- Comparing Memory Systems for Chip Multiprocessors
   |     [PDF]       Jacob Leverich, Hideho Arakida, Alex Solomatikov, Amin Firoozshahian,
   |    [Slides]     Mark Horowitz, Christos Kozyrakis
   \-----------------------------------------------------------------------------------------------